ON FDV302P

P 通道25 V120mA（Ta）1.5V @ 250µA350mW（Ta）-55°C ~ 150°C（TJ）表面贴装型

Overview

General Description ThisP-Channel logic level enhancement mode field effectransistor isproduced using Fairchilds proprietary, high cellensity, DMOS technology. This very high density process isspecially tailored to minimize on-state resistance.Thisevice has been designed especially for low voltagepplications as a replacement for digital transistors. Sinceias resistors are not required, this one P-channel FET caneplace several digital transistors with different bias resistorsuch asthe DTCx and DCDx series.

General Description ThisP-Channel logic level enhancement mode field effectransistor isproduced using Fairchilds proprietary, high cellensity, DMOS technology. This very high density process isspecially tailored to minimize on-state resistance.Thisevice has been designed especially for low voltagepplications as a replacement for digital transistors. Sinceias resistors are not required, this one P-channel FET caneplace several digital transistors with different bias resistorsuch asthe DTCx and DCDx series.

Features

• Gate drive needs are very minimal, allowing direct operation in 3V circuits. VGS(th) < 1.5V.

• For ESD toughness, use a Gate-Source Zener.

• Human Body Model >6kV

• SOT-23 surface mount package is a compact industry standard.

• One DMOS FET can replace multiple PNP digital transistors (DTCx and DCDx).

Applications

FDV302P is intended for general use and can be used in a variety of situations.