TI SN65LVDS100D

缓冲器，转接驱动器CML，LVDS，LVPECLLVDS2Gbps1

Overview

The SN65LVDS100D is a 2Gbps LVDS/LVPECL/CML to LVDS Repeater/Translator formed by connecting high-speed differential receivers and drivers. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL) or current-mode logic (CML) input signals at rates up to 2Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter. The output is LVDS levels as defined by TIA/EIA-644-A. The output is compatible with 3.3V PECL levels. Both drive differential transmission lines with nominally 100R characteristic impedance. It includes an 110R differential line termination resistor for less board space, fewer components and the shortest stub length possible. It does not include the VBB voltage reference. The VBB provides a voltage reference of typically 1.35V below VCC for use in receiving single-ended input signals.

Features

Tube Package
1-Bit receiver.

Surface Mount Mounting Type

Applications

There are a lot of Texas Instruments
SN65LVDS100D Signal Buffers, Repeaters, Splitters applications.

• Loopback
• Clock Distribution
• Servers
• Industrial PCs
• Test Equipment
• Desktop Computers
• Laptop Computers (for External Video Cards)
• Communications Switchers
• Storage Area Networks
• Industrial/Embedded PC