Microchip ZL30164GDG2

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Overview

The ZL30164GDG2 is a triple channel Network Synchronization Clock Translator combining three programmable DPLLs / NCOs with four programmable synthesizers.  The device is a fully compliant SEC (G.813) and EEC (G.8262) flexible rate conversion DPLL.  It is capable of accepting or generating any frequency from 1Hz to 750MHz on up to eleven input references and up to sixteen output clocks. Key

Features

Tray Package
Yes PLL
Ethernet, Fibre Channel, SONET/SDH Main Purpose
Clock, Crystal Input
LVCMOS, LVPECL Output
1 Number of Circuits
12:16 Ratio - Input:Output
Yes/Yes Differential - Input:Output
750MHz Frequency - Max
Surface Mount Mounting Type