Infineon CY2308ZXI-1H

扇出缓冲器（分配），零延迟缓冲带旁路LVCMOS，LVTTLLVCMOS

Overview

The CY2308ZXI-1H is a 3.3V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications. The part has an on-chip PLL that locks to an input clock presented on the REF pin. The PLL feedback is driven into the FBK pin and obtained from one of the outputs. The input-to-output skew is less than 350 ps and output-to-output skew is less than 200 ps.

■ Zero input-output propagation delay, adjustable by capacitive load on FBK input ■ Multiple configurations, see “Available CY2308 Configurations” on page 3 ■ Multiple low skew outputs ■ Two banks of four outputs, three-stateable by two select inputs ■ 10 MHz to 133 MHz operating range ■ 75 ps typical cycle-to-cycle jitter (15 pF, 66 MHz) ■ Space saving 16-pin 150 mil SOIC package or 16-pin TSSOP ■ 3.3V operation ■ Industrial Temperature available

Features

Tube Package
Available in the 16-TSSOP (0.173, 4.40mm Width)
Supply voltage of 3.3V
Operating supply voltage of 3.3V

Surface Mount Mounting Type

Applications

There are a lot of Cypress Semiconductor Corp
CY2308ZXI-1H Clock Generators applications.

• Automatic test equipment
• Wide area power system
• Digital circuits
• Wireless base station for LTE, LTE-advanced
• Picocells, femtocells and small cells
• Sampling clocks for ADC and DAC
• 1 Gigabit Ethernet
• 10 Gigabit Ethernet
• FPGA and processor clocks
• Line cards used in telephone exchange