ON FDC6304P

MOSFET（金属氧化物）逻辑电平门2 个 P 沟道（双）25V460mA1.1 欧姆 @ 500mA，4.5V1.5V @ 250µA

Overview

These P-Channel enhancement mode field effect transistor are produced using a proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery power applications such as notebook computers and cellular phones. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts.

Features

-25V.-0.46 Acontinuous-1.0APeak. RpsiON=1.5|?@Vas=-2.7V RD8ION=1.1|?@Vas=-4.5V.

Very low level gate drive requirements allowing direc! operation in 3V circuits. Vcs<1.5V. Gate-Source Zener for ESD ruggedness.>6kV Human Body Model.

Applications

battery-powered applications