NXP 74HC4020PW/S400118

二进制计数器12 V ~ 6 V

Overview

The 74HC4020PW is a 14-stage Binary Ripple Counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0 and Q3 to Q13). The counter advances on the high-to-low transition of clock. A high on MR clears all counter stages and forces all outputs low, independent of the state of clock. Each counter stage is a static toggle flip-flop. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features

74HC Series
Bulk Package
Binary Counter Logic Type
Up Direction
1 Number of Elements
14 Number of Bits per Element
Asynchronous Reset
109 MHz Count Rate
Negative Edge Trigger Type
2 V ~ 6 V Voltage - Supply
Surface Mount Mounting Type