Renesas 2305-1DCGI

零延迟缓冲器带旁路LVTTLCMOS，LVCMOS，TTL

Overview

The 2305-1DCGI is a low phase noise, high-speed PLL based, low-skew zero delay buffer. Based on IDT's proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides four low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The 2305-1DCGI is available in two different versions. The 2305-1 is the base part. The 2305-1H is a high drive version with faster rise and fall times.

Features

Tube Package
Available in the SOIC
Supply voltage of 3.3V
Operating supply voltage of 3.3V

Surface Mount Mounting Type

Applications

There are a lot of Integrated Device Technology (IDT)
2305-1DCGI Clock Generators applications.

• Automatic test equipment
• Wide area power system
• Digital circuits
• Wireless base station for LTE, LTE-advanced
• Picocells, femtocells and small cells
• Sampling clocks for ADC and DAC
• 1 Gigabit Ethernet
• 10 Gigabit Ethernet
• FPGA and processor clocks
• Line cards used in telephone exchange