ON MC100EPT21DTG

混合信号

Overview

The MC100EPT21DTG is a 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator ideal for applications which requires the translation of a clock or data signal. Because LVPECL (positive ECL), LVDS and positive CML input levels and LVTTL/LVCMOS output levels are used, only 3.3V and ground are required. The VBB output allows this EPT21 to be cap coupled in either single-ended or differential input mode. When single-ended cap coupled, VBB output is tied to the D input and D is driven for a non-inverting buffer or VBB output is tied to the D input and D is driven for an inverting buffer. When cap coupled differentially, VBB output is connected through a resistor to each input pin. If used, the VBB pin should be bypassed to VCC via a 0.01F capacitor. For a single-ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBB for a single-ended direct connection or port to another device.

Features

100EPT Series
8-TSSOP, 8-MSOP (0.118, 3.00mm Width) package
8 pin count
100EPT series
8 pins

Surface Mount Mounting Type

Applications

There are a lot of ON Semiconductor
MC100EPT21DTG voltage translators & level shifters applications.

• Enterprise
• Telecom
• GPIO
• MDIO
• PMBus
• SMBus
• SDIO
• UART
• I2C
• Automotive