ON FDMD86100

MOSFET（金属氧化物）2 N 沟道（双）共源100V10A10.5 毫欧 @ 10A，10V4V @ 250µA

Overview

This package integrates two N-Channel devices connected internally in common-source configuration and incorporates Shielded Gate technology. This enables very low package parasitics and optimized thermal path to the common source pad on the bottom. Provides a very small footprint (5 x 6 mm) for higher power density.

Features

Common source configuration to eliminate PCB routing

Large source pad on bottom of package for enhanced thermals

Shielded Gate MOSFET Technology

Max rDS(on) = 10.5 m|? at VGS = 10 V, ID = 10 A

Max rDS(on) = 17.3 m|? at VGS = 6 V, ID = 7.8 A

Ideal for flexible layout in secondary side synchronous rectification

Termination is Lead-free and RoHS Compliant

100% UIL tested

Applications

This product is general usage and suitable for many different applications.