Xilinx XC95288XV-6PQ208C

Overview

The XC95288XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of 16 54V18 Function Blocks, providing 6,400 usable gates with propagation delays of 6 ns.

ICC(mA) = MCHS(0.175*PTHS + 0.345) + MCLP(0.052*PTLP + 0.272) + 0.04 * MCTOG(MCHS +MCLP)* f where: MCHS = # macrocells in high-speed configuration PTHS = average number of high-speed product terms per macrocell MCLP = # macrocells in low power configuration PTLP = average number of low power product terms per macrocell f = maximum clock frequency MCTOG = average % of flip-flops toggling per clock (~12%) This calculation was derived from laboratory measurements of an XC9500XL part filled with 16-bit counters and allowing a single output (the LSB) to be enabled. The actual ICC value varies with the design application and should be verified during normal system operation. 

Features

PQFP package
168 I/Os
208 pin count
208 pins
16 logic blocks (LABs)

Bulk Package

Applications

There are a lot of Xilinx
XC95288XV-6PQ208C CPLDs applications.

• Address decoders
• Custom state machines
• Digital systems
• Portable digital devices
• Handheld digital devices
• Battery operated portable devices
• Complex programmable logic devices
• Digital designs
• Field programmable gate
• Address decoding