Xilinx XC95288-15HQ208I

系统内可编程（最少 10000 次编程/擦除循环）15 ns16288168

Overview

The XC95288XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of 16 54V18 Function Blocks, providing 6,400 usable gates with propagation delays of 6 ns.

ICC(mA) = MCHS(0.175*PTHS + 0.345) + MCLP(0.052*PTLP + 0.272) + 0.04 * MCTOG(MCHS +MCLP)* f where: MCHS = # macrocells in high-speed configuration PTHS = average number of high-speed product terms per macrocell MCLP = # macrocells in low power configuration PTLP = average number of low power product terms per macrocell f = maximum clock frequency MCTOG = average % of flip-flops toggling per clock (~12%) This calculation was derived from laboratory measurements of an XC9500XL part filled with 16-bit counters and allowing a single output (the LSB) to be enabled. The actual ICC value varies with the design application and should be verified during normal system operation. 

Features

XC9500 Series
208-BFQFP Exposed Pad package
168 I/Os
The operating temperature of -40°C~85°C TA
208 pin count
208 pins
3.3/55V power supplies

Surface Mount Mounting Type

Applications

There are a lot of Xilinx Inc.
XC95288-15HQ208I CPLDs applications.

• Power up sequencing
• Voltage level translation
• Timing control
• Interface bridging
• I/O expansion
• Discrete logic functions
• Bootloaders for FPGAs
• Address decoders
• Custom state machines
• Digital systems