Lattice M5-320/160-7YC

系统内可编程7.5 ns320160

Overview

The MACH® 5 family consists of a broad range of high-density and high-I/O Complex Programmable Logic Devices (CPLDs). The fifth-generation MACH architecture yields fast speeds at high CPLD densities, low power, and supports additional features such as in-system programmability, Boundary Scan testability, and advanced clocking options . The MACH 5 family offers 5-V (M5-xxx) and 3.3-V (M5LV-xxx) operation. 

— Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General

Features

MACH® 5 Series
208-BFQFP package
160 I/Os
The operating temperature of 0°C~70°C TA
208 pin count
208 pins
5V power supplies

Surface Mount Mounting Type

Applications

There are a lot of Lattice Semiconductor Corporation
M5-320/160-7YC CPLDs applications.

• Address decoders
• Custom state machines
• Digital systems
• Portable digital devices
• Handheld digital devices
• Battery operated portable devices
• Complex programmable logic devices
• Digital designs
• Field programmable gate
• Address decoding