Lattice M5-128/104-12YC/1

系统内可编程12 ns128104

Overview

The MACH® 5 family consists of a broad range of high-density and high-I/O Complex Programmable Logic Devices (CPLDs). The fifth-generation MACH architecture yields fast speeds at high CPLD densities, low power, and supports additional features such as in-system programmability, Boundary Scan testability, and advanced clocking options . The MACH 5 family offers 5-V (M5-xxx) and 3.3-V (M5LV-xxx) operation. 

— Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General

Features

Mach® 5 Series
Bulk Package
In System Programmable Programmable Type
12 ns Delay Time tpd(1) Max
4.75V ~ 5.25V Voltage Supply - Internal
128 Number of Macrocells
104 Number of I/O
0°C ~ 70°C (TA) Operating Temperature
Surface Mount Mounting Type