Lattice GAL22V10D-10LP

EE PLD1010 ns

Overview

The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2 ) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10D-10LP to consume much less power when compared to bipolar 22V10 devices. E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently. 

— Standard Logic Speed Upgrade

Features

GAL®22V10 Series
24-DIP (0.300, 7.62mm) package
10 I/Os
The operating temperature of 0°C~75°C TA
24 pin count
24 pins
5V power supplies
10 outputs

Through Hole Mounting Type

Applications

There are a lot of Lattice Semiconductor Corporation
GAL22V10D-10LP CPLDs applications.

• Digital systems
• Portable digital devices
• Handheld digital devices
• Battery operated portable devices
• Complex programmable logic devices
• Digital designs
• Field programmable gate
• Address decoding
• D/T registers and latches
• Synchronous or asynchronous mode