Intel EPM3128ATC144-10N

系统内可编程10 ns812896

Overview

■ High–performance, low–cost CMOS EEPROM–based programmable logic devices (PLDs) built on a MAX architecture ■ 3.3-V in-system programmability(ISP) through the built–in IEEE Std. 1149.1 Joint Test ActionGroup (JTAG) interface with advanced pin-locking capability– ISP circuitry compliant with IEEE Std. 1532■ Built–in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990■ Enhanced ISP features:– Enhanced ISP algorithm for faster programming– ISP_Done bit to ensure complete programming– Pull-up resistor on I/O pinsduring in–system programming■ High–density PLDs ranging from 600 to 10,000 usable gates

– Pull-up resistor on I/O pins during in–system programming

Features

MAX® 3000A Series
144-LQFP package
96 I/Os
The operating temperature of 0°C~70°C TA
2.5/3.33.3V power supplies

Surface Mount Mounting Type

Applications

There are a lot of Intel
EPM3128ATC144-10N CPLDs applications.

• Power up sequencing
• Voltage level translation
• Timing control
• Interface bridging
• I/O expansion
• Discrete logic functions
• Bootloaders for FPGAs
• Address decoders
• Custom state machines
• Digital systems