IDT 8305AGLF

扇出缓冲器（分配），多路复用器12：4

Overview

The 8305AGLF is a low skew, 1-to-4, Differential/ LVCMOS-to-LVCMOS/LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8305AGLF has selectable clock inputs that accept either differential or single ended input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Outputs are forced LOW when the clock is disabled. A separate output enable pin controls whether the outputs are in the active or high impedance state. Guaranteed output and part-to-part skew characteristics make the 8305AGLF ideal for those applications demanding well defined performance and repeatability.

Features

Tube Package
16 terminations
logic IC type of LOW SKEW CLOCK DRIVER

Surface Mount Mounting Type

Applications

There are a lot of Integrated Device Technology (IDT)
8305AGLF Clock Buffers & Drivers applications.

• Synchronous digital system
• Car
• Aviation
• Medical instruments
• Furniture
• Machine made
• Clock signal duplication
• Clock signal format conversion
• Clock signal level shifting
• High performance communication system