IDT 71V424L12PH

512K x 812 ns0°C ~ 70°C（TA）

Overview

The 71V424L12PHG 3.3V CMOS SRAM is organized as 512K x 8. All bidirectional inputs and outputs of the 71V424L12PHG are TTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.

Features

Bulk Package
Volatile Memory Type
SRAM Memory Format
4Mbit Memory Size
512K x 8 Memory Organization
Parallel Memory Interface
12ns Write Cycle Time - Word, Page
12 ns Access Time
3V ~ 3.6V Voltage - Supply
0°C ~ 70°C (TA) Operating Temperature
Surface Mount Mounting Type