Cypress CY7B992-2JC

时钟分配8：8

Overview

The CY7B991 and CY7B992-15JC Programmable Skew Clock Buffers (PSCB) offer user selectable control over system clock functions. These multiple output clock drivers provide the system integrator with functions necessary to optimize the timing of high performance computer systems. Each of the eight individual drivers, arranged in four pairs of user controllable outputs, can drive terminated transmission lines with impedances as low as 50Ω. They can deliver minimal and specified output skews and full swing logic levels (CY7B991 TTL or CY7B992-15JC CMOS).

■ All output pair skew <100 ps typical (250 maximum)■ 3.75 to 80 MHz output operation■ User selectable output functions ❐ Selectable skew to 18 ns ❐ Inverted and non-inverted ❐ Operation at 1⁄2 and 1⁄4 input frequency ❐ Operation at 2x and 4x input frequency (input as low as 3.75 MHz)■ Zero input to output delay■ 50% duty cycle outputs■ Outputs drive 50Ω terminated lines■ Low operating current■ 32-pin PLCC/LCC package■ Jitter < 200 ps peak-to-peak (< 25 ps RMS)

Features

Tray Package
32 terminations
logic IC type of PLL BASED CLOCK DRIVER
at 80MHz frequency

Surface Mount Mounting Type

Applications

There are a lot of Cypress Semiconductor
CY7B992-2JC Clock Buffers & Drivers applications.

• Clock signal duplication
• Clock signal format conversion
• Clock signal level shifting
• High performance communication system
• Data center
• Cloud computing
• Network
• High speed industry
• High-end consumer electronics
• Data communication