Cypress CY74FCT273CTSOC

85.8ns @ 50pF4.75V ~ 5.25V

Overview

The \x92FCT273T devices consist of eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered-clock (CP) and master-reset (MR\) inputs load and reset all flip-flops simultaneously. These devices are edge-triggered registers. The state of each D input (one setup time before the low-to-high clock transition) is transferred to the corresponding flip-flop\x92s Q output. All outputs are forced low by a low logic level on the MR\ input.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

74FCT Series
Tube package
74FCT series
20 pins
8 Bits
5V power supplies

5 pF Input Capacitance

Applications

There are a lot of Texas Instruments
CY74FCT273CTSOC Flip Flops applications.

• Bounce elimination switch
• Data storage
• Data transfer
• Latch
• Registers
• Memory
• Frequency division
• Memory
• Event Detectors
• Data Synchronizers