ADI ADUCM4050BCPZ

ARM® Cortex®-M4F52MHz512KB（512K x 8）

Overview

The ADuCM4050 microcontroller unit (MCU) is an ultra low power integrated microcontroller system with integrated power management for processing, control, and connectivity. The MCU system is based on the ARM® Cortex®-M4F processor. The MCU also has a collection of digital peripherals, embedded static random access memory (SRAM) and embedded flash memory, and an analog subsystem that provides clocking, reset, and power management capabilities in addition to an analog-to-digital converter (ADC) subsystem.

For full details on the ADuCM4050 MCU, refer to the ADuCM4050 Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Hardware Reference.

Features

EEMBC ULPMark?-CP score (3 V): 189

Ultra low power active and hibernate modes

Active mode dynamic current: 41 μA/MHz (typical)

Flexi mode: 400 μA (typical)

Hibernate mode: 0.65 μA (typical)

Shutdown mode: 50 nA (typical)

Shutdown mode (fast wake-up): 0.20 μA (typical)

ARM Cortex-M4F processor at 52 MHz with FPU, MPU, ITM

with SWD interface

Power management

Single-supply operation (connected to VBAT pins): 1.74 V to

3.6 V

Optional buck converter for improved efficiency

Memory options

512 kB of embedded flash memory with ECC

4 kB of cache memory to reduce active power

128 kB of configurable system SRAM with parity

Safety

Watchdog with dedicated on-chip oscillator

Hardware CRC with programmable polynomial

Multiparity bit protected SRAM

ECC protected embedded flash

Security

Hardware cryptographic accelerator supporting AES-128,

AES-256, and SHA-256

Protected key storage in flash, SHA-256-based keyed

HMAC and key wrap and unwrap

User code protection

TRNG

Applications

The ADuCM4050 features cryptographic hardware supporting advanced encryption standard (AES)-128 and AES-256 with secure hash algorithm (SHA)-256 and the following modes: electronic code book (ECB), cipher block chaining (CBC), counter (CTR), and cipher block chaining-message authentication code (CCM/CCM*) modes.